Physical Modeling of the Impact of Process Corner (PVT) Variations on Mismatch in Analog Integrated Circuits in Deep-Nanometer Technologies

Abstract

Mismatch at deep-nanometer process nodes arises from various sources including random doping, line edge roughness, metal-gate work function fluctuation, oxide thickness fluctuation, strain fields, and interface trap states. The supply voltage and temperature fluctuations control the mismatch sensitive parameters via bias dependence and temperature dependence which leads to non-Gaussian, non-stationary and anisotropic correlation in the statistics of threshold voltage, current factor, mobility, subthreshold slope and parasitic parameters. Square-root law and empirical statistical models do not cover their physical coupling mechanisms. We propose a physical modeling framework on mismatch with process corner variations. Solving Poisson equations and quantum-corrected carrier transport equations we build stochastic source terms; using sensitivity tensors and Jacobian operators, pushing forward the PVT perturbation field into covariance kernels of device parameters gives us both continuous and discrete formulation. A mismatch sensitivity tensor and a process corner perturbation propagation operator characterizes the coupling between nonlinear transconductance and parasitic parameter mismatch, providing statistical closure and error bounds for functional modules. This model offers a structure for the statistically describing mismatch in deep-nanometer analog integrated circuits in a physically interpretable way.